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april 2003 revision b 1/26 n operating from v cc =3v to 5.5v n rail to rail input/output n speaker driver with 1 w output @ vcc=5v, thd+n=1%, f=1khz, 8 w load n headset drivers with 160 mw output @ vcc = 5 v, thd+n = 1%, f = 1 khz, 32 w load n headset output is 30 mw in stereo @ vcc=3v n thd+n < 0.5% max @ 20 mw into 32 w btl, 50 hz < frequency < 20 khz n 32-step digital volume control from - 34.5 db to +12 db n +6 db power up volume and full standby n 8 different output modes n pop & click reduction circuitry n low shutdown current (< 100 na) n thermal shutdown protection n flip-chip package 18 x 300 m bumps description the TS4851 is a low power audio amplifier that can drive either both a mono speaker or a stereo headset. to the speaker, it can deliver 400 mw (typ.) of continuous rms output power into an 8 w load with a 1% thd+n value. to the headset driver, the amplifier can deliver 30 mw (typ.) per channel of continuous average power into a stereo 32 w bridged-tied load with 0.5% thd+n @ 3.3 v. this device features a 32-step digital volume control and 8 different output selections. the digital volume and output modes are controlled through a three-digit spi interface bus. applications n mobile phones order code j = flip chip package - only available in tape & reel (jt)) pin connections (top view) part number temperature range package j TS4851ijt -40, +85c pin out (top view) ts485ijt - flip chip bypass r out< - r out + gnd l out + l out - r in l in vcc data vcc nc phone in spkr out+ spkr out - enb gnd clk bypass r out< - r out + gnd l out + l out - r in l in vcc data vcc nc phone in spkr out+ spkr out - enb gnd clk TS4851 mono 1 w speaker and stereo 160 mw headset btl drivers with digital volume control
TS4851 application information for a typical application 2/26 1 application information for a typical application external component descriptions component functional description c in this is the input coupling capacitor. it blocks the dc voltage at, and couples the input signal to the amplifiers input terminals. cin also creates a highpass filter with the internal input impedance zin at fc =1/ (2 p i x zin x cin). c s this is the supply bypass capacitor. it provides power supply filtering. c b this is the bypass pin capacitor. it provides half-supply filtering.
spi bus interface TS4851 3/26 2 spi bus interface 2.1 pin descriptions 2.2 description of spi operation the serial data bits are organized into a field containing 8 bits of data as shown in table 1 . the data 0 to data 2 bits determine the output mode of the TS4851 as shown in table 2 . the data 3 to data 7 bits determine the gain level setting as illustrated by table 3 . for each spi transfer, the data bits are written to the data pin with the least significant bit (lsb) first. all serial data are sampled at the rising edge of the clk signal. once all the data bits have been sampled, enb transitions from logic-high to logic low to complete the spi sequence. all 8 bits must be received before any data latch can occur. any excess clk and data transitions will be ignored after the height rising clock edge has occurred. for any data sequence longer than 8 bits, only the first 8 bits will get loaded into the shift register and the rest of the bits will be disregarded. pin functional description data this is the serial data input pin. clk this is the clock input pin. enb this is the spi enable pin active at high level. table 1: bit allocation data modes lsb data 0 mode 1 data 1 mode 2 data 2 mode 3 data 3 gain 1 data 4 gain 2 data 5 gain 3 data 6 gain 4 msb data 7 gain 5 table 2: output mode selection: g from -34.5 db to +12 db (by steps of 1.5 db) output mode # data 2 data 1 data 0 spkerout 1 rout lout 0 0 0 0 sd sd sd 1 0 0 1 6dbxp sd sd 2 0 1 0 sd 0dbxp 0dbxp 3 0 1 1 gx(r+l) sd sd 4 1 0 0 sd gxr gxl 5 1 0 1 gx(r+l) +6dbxp sd sd 6 1 1 0 sd gxr+0dbxp gxl+0dbxp 7 1 1 1 6dbxp gxr+0dbxp gxl+0dbxp 1) sd = shutdown mode, p = phone in input, r = rin input and l = lin input
TS4851 spi bus interface 4/26 table 3: volume control settings k : gain (db) data 7 data 6 data 5 data 4 data 3 -34.5 0 0 0 0 0 -33.0 0 0 0 0 1 -31.5 0 0 0 1 0 -30.0 0 0 0 1 1 -28.5 0 0 1 0 0 -27.0 0 0 1 0 1 -25.5 0 0 1 1 0 -24.0 0 0 1 1 1 -22.5 0 1 0 0 0 -21.0 0 1 0 0 1 -19.5 0 1 0 1 0 -18.0 0 1 0 1 1 -16.5 0 1 1 0 0 -15.0 0 1 1 0 1 -13.5 0 1 1 1 0 -12.0 0 1 1 1 1 -10.5 1 0 0 0 0 -9.0 1 0 0 0 1 -7.5 1 0 0 1 0 -6.0 1 0 0 1 1 -4.5 1 0 1 0 0 -3.0 1 0 1 0 1 -1.5 1 0 1 1 0 0.0 10111 1.5 11000 3.0 11001 4.5 11010 6 11011 7.5 11100 9 11101 10.5 1 1 1 1 0 12 11111
spi bus interface TS4851 5/26 2.3 spi timing diagram
TS4851 absolute maximum ratings 6/26 3 absolute maximum ratings 4 operating conditions symbol parameter value unit vcc supply voltage 1 1) all voltages values are measured with respect to the ground pin. 6v t oper operating free air temperature range -40 to + 85 c t stg storage temperature -65 to +150 c t j maximum junction temperature 150 c r thja flip chip thermal resistance junction to ambient 2 2) device is protected in case of over temperature by a thermal shutdown active @ 150c 200 c/w pd power dissipation internally limited esd human body model 2 kv esd machine model 100 v latch-up immunity 200 ma lead temperature (soldering, 10sec) 250 c symbol parameter value unit vcc supply voltage 3 to 5.5 v v phin maximum phone in input voltage g nd to v cc v vrin/vlin maximum rin & lin input voltage g nd to v cc v tsd thermal shut down temperature 150 c r thja flip chip thermal resistance junction to ambient 1 1) device is protected in case of over temperature by a thermal shutdown active @ 150c 90 c/w
electrical characteristics TS4851 7/26 5 electrical characteristics table 4: electrical characteristics at vcc = +5 v, gnd = 0 v, tamb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current output mode 7, vin = 0 v, no load all other output modes, vin = 0 v, no load 8 4.5 11 6.5 ma i standby standby current output mode 0 0.1 2 a voo output offset voltage (differential) vin = 0 v 5 50 mv vil logic low input voltage 0 0.4 v vih logic high input voltage 1.4 5 v po output power spkerout, rl = 8 w, thd = 1%, f = 1 khz rout & lout, rl = 32 w, thd = 0.5%, f = 1 khz 800 80 1000 120 mw thd + n total harmonic distortion + noise rout & lout, po = 80 mw, f = 1 khz, rl = 32 w spkerout, po = 800 mw, f = 1 khz, rl = 8 w rout & lout, po = 50 mw, 20 hz < f < 20 khz, rl = 32 w spkerout, po = 40 mw, 20 hz < f < 20 khz, rl = 8 w 0.5 1 0.5 1 % snr signal to noise ratio (a-weighted) 90 db psrr 1 1) all psrr data limits are guaranted by evaluation desgin test. power supply rejection ratio (output mode = 2) 2 vripple = 200 mv vpp, f = 217 hz, input floating vripple = 200 mv vpp, f = 217 hz, input terminated 10 w 2) dynamic measurements [20 x log(rms(vout)/rms(vripple)]. vripple is the superimposed sinus signal to vcc @ f = 217 hz 61 62 db g digital gain range - rin & lin no load -34.5 +12 db digital gain stepsize 1.5 db stepsize g 3 -22.5 db g < -22.5 db -0.5 -1 +0.5 +1 db phone in gain, no load btl gain from phone in to spkerout btl gain from phone in to rout & lout 6 0 db zin phone in input impedance 15 20 25 k w zin rin & lin input impedance (all gain setting) 37.5 50 62.5 k w tes enable stepup time - enb 20 ns teh enable hold time - enb 20 ns tel enable low time - enb 30 ns tds data setup time- data 20 ns tdh data hold time - data 20 ns tcs clock setup time - clk 20 ns tch clock logic high time - clk 50 ns tcl clock logic low time - clk 50 ns fclk clock frequency - clk dc 10 mhz
TS4851 electrical characteristics 8/26 table 5: electrical characteristics at vcc = +3.0v, gnd = 0v, tamb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current output mode 7, vin = 0 v,no load all other output modes, vin = 0 v,no load 7.5 4.5 10 6.5 ma i standby standby current output mode 0 0.1 2 a voo output offset voltage (differential) vin = 0 v 5 50 mv vil logic low input voltage 0 0.4 v vih logic high input voltage 1.4 5 v po output power spkerout, rl = 8 w, thd = 1%, f = 1 khz rout & lout, rl = 32 w, thd = 0.5%, f = 1 khz 300 20 340 30 mw thd + n total harmonic distortion + noise rout & lout, po = 20 mw, f = 1 khz, rl = 32 w spkerout, po = 300 mw, f = 1 khz, rl = 8 w rout & lout, po = 15 mw, 20 hz < f < 20 khz, rl = 32 w spkerout, po = 250 mw, 20 hz < f < 20 khz, rl = 8 w 0.5 1 0.5 1 % snr signal to noise ratio (a-weighted) 86 db psrr 1 power supply rejection ratio (output mode = 2) 2 vripple = 200 mv vpp, f = 217 hz, input floating vripple = 200 mv vpp, f = 217 hz, input terminated 10 w 61 62 db g digital gain range - rin & lin no load -34.5 - +12 db digital gain stepsize 1.5 db stepsize error g 3 -22.5 db g < -22.5 db -0.5 -1 +0.5 +1 db phone in gain, no load btl gain from phone in to spkerout btl gain from phone in to rout & lout 6 0 db zin phone in input impedance 1 15 20 25 k w zin rin & lin input impedance (all gain setting) 1 37.5 50 62.5 k w tes enable stepup time - enb 20 ns teh enable hold time - enb 20 ns tel enable low time - enb 30 ns tds data setup time- data 20 ns tdh data hold time - data 20 ns tcs clock setup time - clk 20 ns tch clock logic high time - clk 50 ns tcl clock logic low time - clk 50 ns fclk clock frequency - clk dc 10 mhz 1) all psrr data limits are guaranted by evaluation desgin test. 2) dynamic measurements [20 x log(rms(vout)/rms(vripple)]. vripple is the superimposed sinus signal to vcc @ f = 217 hz.
electrical characteristics TS4851 9/26 index of graphics note: in the graphs that follow, the abbreviations spkout = speaker output, and hdout = headphone output are used. all measurements made with cin = 220 nf, cb = cs = 1 f except in psrr condition where cs = 0. description figure page thd + n vs. output power figures 1 to 10 page 10 to page 11 thd + n vs. frequency figures 11 to 20 page 11 to page 13 output power vs. power supply voltage figures 21 to 28 page 13 to page 14 psrr vs. frequency figures 29 to 38 page 14 to page 16 frequency response figures 39 to 42 page 16 signal to noise ratio vs. power supply voltage figures 43 to 46 page 17 crosstalk vs. frequency figures 47 to 48 page 18 -3 db lower cut off frequency vs. input capacitor figures 49 to 50 page 18 current consumption vs. power supply voltage figure 51 page 18 power dissipation vs. output power figures 52 to 55 page 18 to page 19 power derating curves figure 56 page 19 -3 db lower cut off frequency vs. gain setting figure 57 page 19
TS4851 electrical characteristics 10/26 figure 1: spkout thd+n vs. output power (output modes 1, 7) figure 2: spkout thd+n vs. output power (output modes 1, 7) figure 3: spkout thd+n vs. output power (output modes 1, 7) figure 4: hdout thd+n vs. output power (output mode 2) figure 5: hdout thd+n vs. output power (output mode 2) figure 6: spkout thd+n vs. output power (output mode 3, g=+12db) 1e-3 0.01 0.1 1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 4 w out. mode = 1, 7 bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 8 w out. mode = 1, 7 bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.01 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w out. mode = 1, 7 bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.01 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w out. mode = 2 bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.01 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 32 w out. mode = 2 bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 4 w out. mode = 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) output power (w)
electrical characteristics TS4851 11/26 figure 7: spkout thd+n vs. output power (output mode 3, g=+12db) figure 8: spkout thd+n vs. output power (output mode 3, g=+12db) figure 9: hdout thd+n vs. output power (output mode 4, g=+12db) figure 10: hdout thd+n vs. output power (output mode 4, g=+12db) figure 11: spkout thd+n vs. frequency (output modes 1, 7) figure 12: spkout thd+n vs. frequency (output modes 1, 7) 1e-3 0.01 0.1 1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 8 w out. mode = 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w out. mode = 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 16 w out. mode = 4 g = +12db bw < 125khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.1 1 10 vcc=3v f=20khz vcc=5v f=20khz vcc=3v f=1khz vcc=5v f=1khz rl = 32 w out. mode = 4 g = +12db bw < 125khz tamb = 25 c thd + n (%) output power (w) 100 1000 10000 0.01 0.1 1 10 20k 20 vcc=3v p=450mw vcc=5v p=1.1w rl = 4 w out. mode = 1, 7 bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 20k 20 vcc=3v p=350mw vcc=5v p=0.8w rl = 8 w out. mode = 1, 7 bw < 125khz tamb = 25 c thd + n (%) frequency (hz)
TS4851 electrical characteristics 12/26 figure 13: spkout thd+n vs. frequency (output modes 1, 7) figure 14: hdout thd+n vs. frequency (output mode 2) figure 15: hdout thd+n vs. frequency (output mode 2) figure 16: spkout thd+n vs.frequency (output mode 3, g = +12 db) figure 17: spkout thd+n vs. frequency (output mode 3, g = +12 db) figure 18: spkout thd+n vs. frequency (output mode 3, g = +12 db) 100 1000 10000 0.01 0.1 1 10 20k 20 vcc=3v p=180mw vcc=5v p=0.55w rl = 16 w out. mode = 1, 7 bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 20k 20 vcc=3v p=40mw vcc=5v p=220mw rl = 16 w out. mode = 2 bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 20k 20 vcc=3v p=20mw vcc=5v p=100mw rl = 32 w out. mode = 2 bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 20k 20 vcc=3v p=450mw vcc=5v p=1.1w rl = 4 w out. mode = 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 20k 20 vcc=3v p=350mw vcc=5v p=0.8w rl = 8 w out. mode = 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 20k 20 vcc=3v p=180mw vcc=5v p=0.55w rl = 16 w out. mode = 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz)
electrical characteristics TS4851 13/26 figure 19: hdout thd+n vs. frequency (output mode 4, g = +12 db) figure 20: hdout thd+n vs. frequency (output mode 4, g = +12 db) figure 21: speaker output power vs. power supply voltage (output mode 1, 7) figure 22: speaker output power vs. power supply voltage (output mode 1, 7) figure 23: headphone output power vs. load resistor (output mode 2) figure 24: headphone output power vs. load resistor (output mode 2) 100 1000 10000 0.1 1 10 20k 20 vcc=3v p=40mw vcc=5v p=220mw rl = 16 w out. mode = 4 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 20k 20 vcc=3v p=20mw vcc=5v p=100mw rl = 32 w out. mode = 4 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.4 0.8 1.2 1.6 2.0 32 w f = 1khz output mode = 1, 7 bw < 125khz tamb = 25 c 16 w 4 w 8 w output power at 1% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.4 0.8 1.2 1.6 2.0 2.4 32 w f = 1khz output mode = 1, 7 bw < 125khz tamb = 25 c 16 w 4 w 8 w output power at 10% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0 50 100 150 200 250 300 350 64 w f = 1khz output mode = 2 bw < 125khz tamb = 25 c 16 w 32 w output power at 1% thd + n (mw) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0 50 100 150 200 250 300 350 400 64 w f = 1khz output mode = 2 bw < 125khz tamb = 25 c 16 w 32 w output power at 10% thd + n (mw) vcc (v)
TS4851 electrical characteristics 14/26 figure 25: speaker output power vs. power supply voltage (output mode 3) figure 26: speaker output power vs. power supply voltage (output mode 3) figure 27: headphone output power vs. load resistor (output mode 4) figure 28: headphone output power vs. load resistance (output mode 2) figure 29: spkout psrr vs. frequency (output modes 1, 7, input grounded) figure 30: hdout psrr vs. frequency (output mode 2, input grounded) 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.4 0.8 1.2 1.6 2.0 32 w f = 1khz output mode = 3 bw < 125khz tamb = 25 c 16 w 4 w 8 w output power at 1% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.4 0.8 1.2 1.6 2.0 2.4 32 w f = 1khz output mode = 3 bw < 125khz tamb = 25 c 16 w 4 w 8 w output power at 10% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0 50 100 150 200 250 300 350 64 w f = 1khz output mode = 4 bw < 125khz tamb = 25 c 16 w 32 w output power at 1% thd + n (mw) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0 50 100 150 200 250 300 350 400 64 w f = 1khz output mode = 4 bw < 125khz tamb = 25 c 16 w 32 w output power at 10% thd + n (mw) vcc (v) 100 1000 10000 100000 -70 -60 -50 -40 -30 -20 -10 0 vcc=5v vcc=3v ouput mode 1, 7 rl = 8 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -70 -60 -50 -40 -30 -20 -10 0 vcc=3v & 5v ouput mode 2 rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz)
electrical characteristics TS4851 15/26 figure 31: spkout psrr vs. frequency (output mode 3, inputs grounded) figure 32: spkout psrr vs. frequency (output mode 3, inputs grounded) figure 33: hdout psrr vs. frequency (output mode 4, inputs grounded) figure 34: hdout psrr vs. frequency (output mode 4, inputs grounded) figure 35: spkout psrr vs. frequency (output mode 5, inputs grounded) figure 36: spkout psrr vs. frequency (output mode 5, inputs grounded) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 3 vcc=+5v rl = 8 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 3 vcc=+3v rl = 8 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 4 vcc=+5v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 4 vcc=+3v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 5 vcc=+5v rl = 8 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 5 vcc=+3v rl = 8 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz)
TS4851 electrical characteristics 16/26 figure 37: hdout psrr vs. frequency (output modes 6, 7, inputs grounded) figure 38: hdout psrr vs. freq., (output modes 6, 7, inputs grounded) figure 39: spkout frequency response (output mode 1, 7) figure 40: hdout frequency response (output mode 2) figure 41: spkout frequency response (output mode 3) figure 42: hdout frequency response (output mode 4) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 6, 7 vcc=+5v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -50 -40 -30 -20 -10 0 g=+6db g=+9db g=-34.5db g=-12db g=0db g=+12db output mode 6, 7 vcc=+3v rl = 32 w vripple=0.2vpp bw < 125khz tamb = 25 c psrr (db) frequency (hz) 20 100 1000 10000 0 2 4 6 vcc=3v vcc=5v ouput mode 1, 7 rl = 8 w cin=220nf bw < 125khz tamb = 25 c output level (db) frequency (hz) 20 100 1000 10000 -6 -4 -2 0 vcc=5v vcc=3v ouput mode 2 rl = 32 w cin=220nf bw < 125khz tamb = 25 c output level (db) frequency (hz) 20 100 1000 10000 0 2 4 6 8 10 12 vcc=3v vcc=5v ouput mode 3 rl = 8 w g = +12db cin=220nf bw < 125khz tamb = 25 c output level (db) frequency (hz) 20 100 1000 10000 0 2 4 6 8 10 12 vcc=3v vcc=5v ouput mode 4 rl = 32 w g = +12db cin=220nf bw < 125khz tamb = 25 c output level (db) frequency (hz)
electrical characteristics TS4851 17/26 figure 43: spkout snr vs. power supply voltage, unweighted filter, bw = 20 hz to 20 khz figure 44: spkout snr vs. power supply voltage, weighted filter a, bw = 20 hz to 20 khz figure 45: hdout snr vs. power supply voltage, unweighted filter, bw = 20 hz to 20 khz figure 46: hdout snr vs. power supply voltage, weighted filter a, bw = 20 hz to 20 khz ohms ohms ohms ohms ohms
TS4851 electrical characteristics 18/26 figure 47: crosstalk vs. frequency (output mode 4) figure 48: crosstalk vs. frequency (output mode 4) figure 49: -3 db lower cut off frequency vs. input capacitor figure 50: -3 db lower cut off frequency vs. input capacitance figure 51: current consumption vs. power supply voltage figure 52: power dissipation vs. output power (speaker output) 20 100 1000 10000 -80 -60 -40 -20 0 lout -> rout rout -> lout ouput mode 4 vcc = 5v rl = 32 w g = +12db pout = 100mw bw < 125khz tamb = 25 c crosstalk level (db) frequency (hz) 20 100 1000 10000 -80 -60 -40 -20 0 rout -> lout lout -> rout ouput mode 4 vcc = 3v rl = 32 w g = +12db pout = 20mw bw < 125khz tamb = 25 c crosstalk level (db) frequency (hz) 0.1 1 10 100 minimum input impedance maximum input impedance typical input impedance phone in input tamb=25 c lower -3db cut off frequency (hz) input capacitor ( f) 0.1 1 1 10 minimum input impedance maximum input impedance typical input impedance rin & lin inputs all gain setting tamb=25 c lower -3db cut off frequency (hz) input capacitor ( m f) 012345 0 1 2 3 4 5 6 7 8 9 10 no loads tamb = 25 c mode 1, 3, 5 mode 2, 4, 6 mode 7 icc (ma) vcc (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 rl=16 w rl=8 w vcc=5v f=1khz thd+n<1% rl=4 w power dissipation (w) output power (w)
electrical characteristics TS4851 19/26 figure 53: power dissipation vs. output power (speaker output) figure 54: power dissipation vs. output power (headphone output, one channel) figure 55: power dissipation vs. output power (headphone output one channel) figure 56: power derating curves figure 57: -3 db lower cut off frequency vs. gain setting (output modes 3, 4, 5, 6, 7) table 6: output noise (all inputs grounded) 0.0 0.1 0.2 0.3 0.4 0.5 0.0 0.1 0.2 0.3 0.4 0.5 rl=4 w rl=8 w vcc=3v f=1khz thd+n<1% rl=16 w power dissipation (w) output power (w) 0.00 0.05 0.10 0.15 0.20 0.25 0.0 0.1 0.2 0.3 0.4 rl=16 w rl=32 w vcc=5v f=1khz thd+n<1% power dissipation (w) output power (w) 0 10203040506070 0 20 40 60 80 100 120 rl=32 w vcc=3v f=1khz thd+n<1% rl=16 w power dissipation (mw) output power (mw) output mode unweighted filter from 3v to 5v weighted filter (a) from 3v to 5v 123 m vrms 20 m vrms 220 m vrms 17 m vrms 3 70vvrms 60 m vrms 453 m vrms 45 m vrms 579 m vrms 67 m vrms 660 m vrms 51vvrms -20 0 1 10 100 cin=1 m f cin=470nf cin=220nf cin=100nf rin & lin inputs input impedance is nominal tamb=25 c 12 -34.5 lower -3db cut off frequency (hz) gain setting (db) 0 25 50 75 100 125 150 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 no heat sink heat sink surface = 125mm 2 flip-chip package power dissipation (w) ambiant temperature ( c)
TS4851 application information 20/26 6 application information 6.1 btl configuration principles the TS4851 integrates 3 monolithic power amplifier having btl output. btl (bridge tied load) means that each end of the load is connected to two single-ended output amplifiers. thus, we have: single ended output 1 = vout1 = vout (v) single ended output 2 = vout2 = -vout (v) and vout1 - vout2 = 2vout (v) the output power is: for the same power supply voltage, the output power in btl configuration is four times higher than the output power in single ended configuration. 6.2 power dissipation and efficiency hypotheses: l voltage and current in the load are sinusoidal (vout and iout). l supply voltage is a pure dc source (vcc). regarding the load we have: and and then, the average current delivered by the supply voltage is: the power delivered by the supply voltage is: psupply = vcc icc avg (w) then, the power dissipated by each amplifier is pdiss = psupply - pout (w) and the maximum value is obtained when: and its value is: note: this maximum value is depends only on power supply voltage and load values. the efficiency is the ratio between the output power and the power supply: the maximum theoretical value is reached when vpeak = vcc, so: the TS4851 has three independent power amplifiers. each amplifier produces heat due to its power dissipation. therefore, the maximum die temperature is the sum of each amplifiers maximum power dissipation. it is calculated as follows: l p diss speaker = power dissipation due to the speaker power amplifier. l p diss head = power dissipation due to the headphone power amplifier l to t a l p diss = p diss speaker + p diss head1 + p diss head2 (w) in most cases, p diss head1 = p diss head2 , giving: to t a l p diss = p diss speaker + 2p diss head (w) ) w ( r ) vout 2 ( pout l 2 rms = v out = v peak sin w t (v) i out = v out r l ---------------- - (a) p out = v peak 2 2r l ---------------------- ( w ) i cc avg = 2 v peak p r l ------------------- - (a) ) w ( p p r v 2 2 p out out l cc diss - p = ? pdiss ? p out --------------------- - = 0 ) w ( r vcc 2 max pdiss l 2 2 p = h = p out psupply ----------------------- - = p v peak 4v cc ----------------------- p 4 ---- - = 78.5% [] ) w ( p 2 p r p 2 r p v 2 2 totalp head out speaker out head l head out speaker l speaker out cc diss + - ? ? + p =
application information TS4851 21/26 the following graph ( figure 58 ) shows an example of the previous formula, with vcc set to +5 v, r load speaker set to 8 w and r load headphone set to 16 w . figure 58: example of total power dissipation vs. speaker and headphone output power 6.3 low frequency response in low frequency region, the effect of cin starts. cin with zin forms a high pass filter with a -3 db cut off frequency. zin is the input impedance of the corresponding input: ?20k w for phone in ihf input ?50k w for the 3 other inputs note: for all inputs, the impedance value remains constant for all gain settings. this means that the lower cut-off frequency doesnt change with gain setting. note also that 20 k w and 50 k w are typical values and there are tolerances around these values (see electrical characteristics on page 7). in figures 39 to 41 , you could easily establish the cin value for a -3 db cut-off frequency required. 6.4 decoupling of the circuit two capacitors are needed to bypass properly the TS4851, a power supply bypass capacitor cs and a bias voltage bypass capacitor cb. cs has especially an influence on the thd+n in high frequency (above 7 khz) and indirectly on the power supply disturbances. with 1 f, you could expect similar thd+n performances like shown in the datasheet. if cs is lower than 1 f, thd+n increases in high frequency and disturbances on the power supply rail are less filtered. to the contrary, if cs is higher than 1 f, those disturbances on the power supply rail are more filtered. cb has an influence on thd+n in lower frequency, but its value is critical on the final result of psrr with input grounded in lower frequency: ? if cb is lower than 1 f, thd+n increases at lower frequencies and the psrr worsens upwards. ? if cb is higher than 1 f, the benefit on thd+n and psrr in the lower frequency range is small. 6.5 startup time when the TS4851 is controlled to switch from the full standby mode (output mode 0) to another output mode, a delay is necessary to stabilize the dc bias. this delay depends on the cb value and can be calculated by the following formulas. typical startup time = 0.0175 x cb (s) max. startup time = 0.025 x cb (s) (cb is in f in these formulas) these formulas assume that the cb voltage is equal to 0 v. if the cb voltage is not equal to 0v, the startup time will be always lower. the startup time is the delay between the negative edge of enable input (see description of spi operation on page 3) and the power on of the output amplifiers. note: when the TS4851 is set in full standby mode, cb is discharged through an internal resistor. the time to reach 0 v of cb voltage could be calculated by the following formula: tdischarge = 3 x cb (s) note: cb must be in f in this formula. ) hz ( cin zin 2 1 f cl p =
TS4851 application information 22/26 6.6 pop and click performance the TS4851 has internal pop and click reduction circuitry. the performance of this circuitry is closely linked with the value of the input capacitor cin and the bias voltage bypass capacitor cb. the value of cin is due to the lower cut-off frequency value requested. the value of cb is due to thd+n and psrr requested always in lower frequency. the TS4851 is optimized to have a low pop and click in the typical schematic configuration (see page 2 ). note: the value of cs is not an important consideration as regards pop and click. 6.7 notes on psrr measurement what is the psrr? the psrr is the power supply rejection ratio. the psrr of a device, is the ratio between a power supply disturbance and the result on the output. we can say that the psrr is the ability of a device to minimize the impact of power supply disturbances to the output. how we measure the psrr? the pssr was measured according to the schematic shown in figure 59 . figure 59: psrr measurement schematic principles of operation ? the dc voltage supply (vcc) is fixed. ? the ac sinusoidal ripple voltage (vripple) is fixed. ? no bypass capacitor cs is used. the psrr value for each frequency is: note: the measure of the rms voltage is not an rms selective measure but a full range (20 hz to 125 khz) rms measure. this means that the effective rms signal + the noise is measured. as the measurement is performed with a wide- band frequency range apparatus, we have to subtract the noise part (quadratic operation) of the measurement to obtain the real rms signal needed to calculate the psrr, as shown in the formula above. ) db ( rms rms log 20 psrr ) vripple ( ) output ( ? ? =
package information TS4851 23/26 7 package information flip-chip - 18 bumps: TS4851jt pin out (top view) marking (top view): the following markings are present on the topside of the flip-chip: l the st logo. l the part number: a51. l a 3-digit date code: yww. l a dot marking the location of pin1a. note: the solder bumps are on the underside. r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - cl k gnd bypass 1 5 4 3 2 7 6 ae d c b r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - cl k gnd bypass 1 5 4 3 2 7 6 ae d c b a51 yww a51 yww
TS4851 package information 24/26 TS4851 footprint recommendation package mechanical data die size: 2170 m m x 2440 m m 30 m m die height (including bumps): 600 m m 30 m m bumps diameter: 300 m m 15 m m bumps height: 250 m m 15 m m pitch: 500 m m 10 m m 866 m m 866 m m 500 m m 750 m m 2440 m m 2170 m m 600 m m 866 m m 866 m m 500 m m 750 m m 2440 m m 2170 m m 600 m m
daisy chain samples TS4851 25/26 8 daisy chain samples a daisy chain sample is a dummy silicon chip that can be used to test your flip-chip soldering process and connection continuity. the daisy chain sample features paired connections between bumps, as shown in the schematic below. on your pcb layout, you should design the bump connections such that they are complementary to the above schema (meaning that different pairs of bumps are connected on the pcb side). in this way, by simply connecting an ohmmeter between pin 1a and pin 5a, you can test the continuity of your soldering process. the order code for daisy chain samples is given below. order code for daisy chain samples figure 60: daisy chain sample mechanical data r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass 2.44 mm 2.17 mm ae d c b 1 5 4 3 2 7 6 r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass 2.44 mm 2.17 mm r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass 2.44 mm 2.17 mm ae d c b 1 5 4 3 2 7 6 ae d c b 1 5 4 3 2 7 6 part number temperature range package marking j tsdc02ijt -40, +85c dc2
TS4851 tape & reel specification 26/26 9 tape & reel specification device orientation the devices are oriented in the carrier pocket with pin number 1a adjacent to the sprocket holes. figure 61: top view of tape and reel a 1 a 1 user direction of feed a 1 a 1 user direction of feed information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - switzerland - united kingdom http://www.st.com

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